The semiconductor integrated circuit (IC) industry has experienced exponential growth. Technological advances in IC materials and design have produced generations of ICs where each generation has smaller and more complex circuits than the previous generation. In the course of IC evolution, functional density (i.e., the number of interconnected devices per chip area) has generally increased while geometry size (i.e., the smallest component (or line) that can be created using a fabrication process) has decreased. This scaling down process generally provides benefits by increasing production efficiency and lowering associated costs. Such scaling down has also increased the complexity of processing and manufacturing ICs and, for these advances to be realized, similar developments in IC processing and manufacturing are needed.
For example, the scaling down of a conventional complementary metal oxide semiconductor (CMOS) transistor faces challenges of rapidly increasing power consumption due to an off-state current leakage. The off-state current leakage is caused by the decreasing thickness of a gate oxide film associated with the scaling down of the CMOS transistor. Accordingly, what is needed is a method or device for further scaling down of a transistor.